82801DB Datasheet, PDF (371/587 Pages) Intel Corporation – Intel 82801DB I/O Controller Hub 4 (ICH4)

LPC Interface Bridge Registers (D31:F0)
9.9
System Management TCO Registers (D31:F0)
The TCO logic is accessed via registers mapped to the PCI configuration space
(Device 31:Function 0) and the system I/O space. For TCO PCI Configuration registers, see LPC
Device 31:Function 0 PCI Configuration registers.
The TCO I/O registers reside in a 32-byte range pointed to by a TCOBASE value, which is,
ACPIBASE + 60h in the PCI configuration space. Table 9-11 shows the mapping of the registers
within that 32-byte range. Each register is described in the following sections.
Table 9-11. TCO I/O Register Map
Offset
00h
01h
02h
03h
04h–05h
06h–07h
Mnemonic
TCO_RLD
TCO_TMR
TCO_DAT_IN
TCO_DAT_OUT
TCO1_STS
TCO2_STS
Register Name
TCO Timer Reload and Current Value
TCO Timer Initial Value
TCO Data In
TCO Data Out
TCO Status
TCO Status
08h–09h
TCO1_CNT
TCO Control
0Ah–0Bh
0Ch–0Dh
0Eh
0Fh
10h
11h–1Fh
TCO2_CNT
TCO_MESSAGE1
TCO_MESSAGE2
TCO_WDSTATUS
—
SW_IRQ_GEN
—
TCO Control
Used by BIOS to indicate POST/Boot progress
Watchdog Status Register
Reserved
Software IRQ Generation Register
Reserved
Type
R/W
R/W
R/W
R/W
R/W, RO
R/W
R/W, R/WC,
R/W-Special
R/W
R/W
R/W
RO
R/W
RO
9.9.1
TCO1_RLD—TCO Timer Reload and Current Value Register
I/O Address:
Default Value:
Lockable:
TCOBASE +00h
0000h
No
Attribute:
Size:
Power Well:
R/W
8 bit
Core
Bit
Description
7:0
Reading this register will return the current count of the TCO timer. Writing any value to this register
will reload the timer to prevent the timeout. Bits 7:6 will always be 0.
Intel^® 82801DB ICH4 Datasheet
371