HD6432345 Datasheet, PDF (96/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

3.3.5 Mode 5*²
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Pins P1₃ to P1₀, ports A, B and C function as an address bus, port D function as a data bus, and
part of port F carries bus control signals. Pins P1₃ to P1₀ function as inputs immediately after a
reset. They can each be set to output addresses by setting the corresponding bits in the data
direction register (DDR) to 1.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, note that if at
least one area is designated for 16-bit access by the bus controller, the bus mode switches to 16
bits and port E becomes a data bus.
3.3.6 Mode 6*¹
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled.
Pins P1₃ to P1₀, ports A, B and C function as input ports immediately after a reset. They can each
be set to output addresses by setting the corresponding bits in the data direction register (DDR) to
1. Port D functions as a data bus, and part of port F carries bus control signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, if any area is
designated as 16-bit access space by the bus controller, 16-bit bus mode is set and port E becomes
a data bus.
3.3.7 Mode 7*¹
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled,
but external addresses cannot be accessed.
All I/O ports are available for use as input-output ports.
Notes: 1. Not used on ROMless version.
2. The upper address pins (A₂₃ to A₂₀) cannot be used as outputs in modes 4 or 5
immediately after a reset. To use the upper address pins (A₂₃ to A₂₀) as outputs, it is
necessary to first set the corresponding bits in the port 1 data direction register
(P1DDR) to 1.
3.3.8 Modes 8 and 9 (F-ZTAT Version Only)
Modes 8 and 9 are not supported in the H8S/2345 Series, and must not be set.
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