HD6432345 Datasheet, PDF (142/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

5.4.4 Interrupt Exception Handling Sequence
Figure 5.7 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.
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