HD6432345 Datasheet, PDF (495/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

13.2.4 Serial Control Register (SCR)
Bit
:
7
TIE
Initial value :
0
R/W
: R/W
6
RIE
0
R/W
5
4
3
2
1
0
TE
RE MPIE TEIE CKE1 CKE0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W
Bits 1 and 0 of SCR have a different function in smart card interface mode.
Bits 7 to 2—Operate in the same way as for the normal SCI.
For details, see section 12.2.6, Serial Control Register (SCR).
Bits 1 and 0—Clock Enable (CKE1, CKE0): Selects the clock source, and enables or disables
clock output from the SCK pin.
In smart card interface mode, it is possible to switch between enabling and disabling of the normal
clock output, and specify a fixed high level or fixed low level for the clock output.
SCMR
SMIF
0
1
SMR
SCR Setting
C/A, GM CKE1 CKE0
0
0
0
1
1
0
1
1
0
1
SCK Pin Function Description
Refer to SCI designation
The pin functions as an I/O port
The pin outputs the clock as the SCK output pin
The pin outputs fixed low level as the SCK output pin
The pin outputs the clock as the SCK output pin
The pin outputs fixed high level as the SCK output pin
The pin outputs the clock as the SCK output pin
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