HD6432345 Datasheet, PDF (588/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

*3
Erase setup
status
E=1
E=0
Erase mode
User mode *1
ESU = 1
ESU = 0
*4
FWE = 1 FWE = 0
EV = 1
Erase verify
*2
mode
On-board
programming mode
Software overwrite disabled
status
SWE = 1 Software
overwrite enabled
SWE = 0
status
EV = 0
PSU = 1
PSU = 0
Program setup
status
P=1
P=0
PV = 0 ^{PV = 1}
Program
mode
Program verify
mode
Notes: 1.
: user mode,
: on-board programming mode
2. Do not make transitions by setting or clearing multiple bits simultaneously.
3. After changing from erase mode to erase setup status, do not change back to erase mode except
via software overwrite enable status.
4. After changing from program mode to program setup status, do not change back to program mode
except via software overwrite enable status.
Figure 17.20 Mode Transitions Using Settings of Bits in FLMCR1 and FLMCR2
17.9.1 Program Mode
Follow the procedure shown in the program/program-verify flowchart in figure 17.21 to write data
or programs to flash memory. Performing program operations according to this flowchart will
enable data or programs to be written to flash memory without subjecting the device to voltage
stress or sacrificing program data reliability. Programming should be carried out 32 bytes at a
time.
The wait times (x, y, z, α, ß, γ, ε, η) after bits are set or cleared in flash memory control registers 1
and 2 (FLMCR1, FLMCR2) and the maximum number of programming operations (N) are shown
in table 22.10 in section 20.1.6, Flash Memory Characteristics.
Following the elapse of (x) µs or more after the SWE bit is set to 1 in FLMCR1, 32-byte program
data is stored in the program data area and reprogram data area, and the 32-byte data in the
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