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HD6432345 Datasheet, PDF (264/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual
Modes 2 and 6*: In modes 2 and 6*, port B pins function as address outputs or input ports. Input
or output can be specified on an individual bit basis. Setting a PBDDR bit to 1 makes the
corresponding port B pin an address output, while clearing the bit to 0 makes the pin an input port.
Port B pin functions in modes 2 and 6 are shown in figure 8.11.
Port B
When PBDDR = 1
A15 (output)
A14 (output)
A13 (output)
A12 (output)
A11 (output)
A10 (output)
A9 (output)
A8 (output)
When PBDDR = 0
PB7 (input)
PB6 (input)
PB5 (input)
PB4 (input)
PB3 (input)
PB2 (input)
PB1 (input)
PB0 (input)
Figure 8.11 Port B Pin Functions (Modes 2 and 6) *
Modes 3 and 7*: In modes 3 and 7*, port B pins function as I/O ports. Input or output can be
specified for each pin on an individual bit basis. Setting a PBDDR bit to 1 makes the
corresponding port B pin an output port, while clearing the bit to 0 makes the pin an input port.
Port B pin functions in modes 3 and 7 are shown in figure 8.12.
Port B
PB7 (I/O)
PB6 (I/O)
PB5 (I/O)
PB4 (I/O)
PB3 (I/O)
PB2 (I/O)
PB1 (I/O)
PB0 (I/O)
Figure 8.12 Port B Pin Functions (Modes 3 and 7)*
Note: * Modes 1 to 3 are not available on the F-ZTAT version.
Modes 2, 3, 6, and 7 are not available on the ROMless version.
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