HD6432345 Datasheet, PDF (782/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

TIER4—Timer Interrupt Enable Register 4
H'FE94
TPU4
Bit
:
Initial value :
Read/Write :
7
TTGE
0
R/W
6
5
4
3
— TCIEU TCIEV —
1
0
0
0
—
R/W R/W
—
2
1
0
— TGIEB TGIEA
0
0
0
—
R/W R/W
TGR Interrupt Enable A
0 Interrupt requests (TGIA)
by TGFA bit disabled
1 Interrupt requests (TGIA)
by TGFA bit enabled
TGR Interrupt Enable B
0 Interrupt requests (TGIB) by
TGFB bit disabled
1 Interrupt requests (TGIB) by
TGFB bit enabled
Overflow Interrupt Enable
0 Interrupt requests (TCIV) by TCFV disabled
1 _{Interrupt requests (TCIV) by TCFV enabled}
Underflow Interrupt Enable
0 Interrupt requests (TCIU) by TCFU disabled
1 Interrupt requests (TCIU) by TCFU enabled
A/D Conversion Start Request Enable
0 A/D conversion start request generation disabled
1 A/D conversion start request generation enabled
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