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HD6432345 Datasheet, PDF (645/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual
Table 20.2 DC Characteristics (cont)
— In planning stage —
Conditions: VCC = AVCC = 3.0 to 3.6 V, Vref = 3.0 V to AVCC, VSS = AVSS = 0 V*1,
Ta = –20 to +75°C (regular specifications), Ta = –40 to +85°C (wide-range
specifications)
Item
Symbol Min
Typ Max
Unit Test Conditions
Three-state Port 1 to 3, ITSI
—
leakage
A to G
current
(off state)
— 1.0
µA
Vin =
0.5 to VCC –0.5 V
MOS input Port A to E –IP
10
pull-up current
Input
capacitance
RES
NMI
Cin
—
—
All input pins
—
except RES
and NMI
— 300
— 80
— 50
— 15
µA VCC = 2.7 V to
5.5 V, Vin = 0 V
pF Vin = 0 V
pF f = 1 MHz
pF
Ta = 25°C
Current
Normal
I CC*4
—
dissipation*2 operation
TBD TBD
(3.3 V)
mA f = 10 MHz
Sleep mode
—
TBD TBD
mA f = 10 MHz
(3.3 V)
Standby
mode*3
During flash
memory
programming/
erase
—
0.01 5.0
µA Ta ≤ 50°C
—
— 20
50°C < Ta
—
TBD TBD
mA 0°C ≤ Ta ≤ 75°C
(3.3 V)
f = 10 MHz
Analog power During A/D AlCC
—
supply current and D/A
conversion
TBD TBD
mA
(3.3 V)
Idle
—
0.01 5.0
µA
Reference
During A/D AlCC
—
current
and D/A
conversion
TBD TBD
(3.3 V)
mA Vref = 3.3 V
Idle
—
0.01 5.0
µA
RAM standby voltage
VRAM
2.0
——
V
Notes: 1. If the A/D and D/A converters are not used, do not leave the AVCC, AVSS, and Vref pins
open.
Connect AVCC and Vref to VCC, and connect AVSS to VSS.
2. Current dissipation values are for VIH min = VCC –0.5 V and VIL max = 0.5V with all
output pins unloaded and the on-chip pull-up transistors in the off state.
3. The values are for VRAM ≤ VCC < 2.7 V, VIH min = VCC × 0.9, and VIL max = 0.3V.
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