HD6432345 Datasheet, PDF (609/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

FWE
t_pns
Address
t_ceh
CE
t_nxtc
OE
t_wep
WE
t_ces
FO₇
FO₆
t_f
t_r
t_ds
t_dh
Data
H'40
Address
stable
t_as
t_ah
Data transfer
1 byte to 128 bytes
Data
t_pnh
t_wsts
t_spa
t_{write (1 to 3000 ms)}
Programming operation
end identification signal
t_nxtc
Programming normal
end identification signal
Programming wait
Data
FO₀ to FO₅ = 0
Figure 17.31 Auto-Program Mode Timing Waveforms
Notes on Use of Auto-Program Mode
• In auto-program mode, 128 bytes are programmed simultaneously. This should be carried out
by executing 128 consecutive byte transfers.
• A 128-byte data transfer is necessary even when programming fewer than 128 bytes. In this
case, H'FF data must be written to the extra addresses.
• The lower 8 bits of the transfer address must be H'00 or H'80. If a value other than an effective
address is input, processing will switch to a memory write operation but a write error will be
flagged.
• Memory address transfer is performed in the second cycle (figure 17.31). Do not perform
memory address transfer after the second cycle.
• Do not perform a command write during a programming operation.
• Perform one auto-programming operation for a 128-byte block for each address.
Characteristics are not guaranteed for two or more programming operations.
• Confirm normal end of auto-programming by checking FO₆. Alternatively, status read mode
can also be used for this purpose (FO₇ status polling uses the auto-program operation end
identification pin).
• The status polling FO₆ and FO₇ pin information is retained until the next command write. Until
the next command write is performed, reading is possible by enabling CE and OE.
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