HD6432345 Datasheet, PDF (874/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

P2_n
*
Reset
R
Q
D
P2nDDR
C
WDDR2
Reset
R
Q
D
P2nDR
C
WDR2
RDR2
TPU module
Output compare output/
PWM output enable
Output compare output/
PWM output
RPOR2
Legend
WDDR2 : Write to P2DDR
WDR2 : Write to P2DR
RDR2 : Read P2DR
RPOR2 : Read port 2
n = 2 or 4
Input capture input
8-bit timer module
Counter external reset
input
Note: * Priority order: Output compare output/PWM output > DR output
Figure C.2 (b) Port 2 Block Diagram (Pins P2₂ and P2₄)
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