HD6432345 Datasheet, PDF (120/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

4.6 Stack Status after Exception Handling
Figure 4.5 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP
CCR
CCR*
PC
(16 bits)
SP
EXR
Reserved*
CCR
CCR*
PC
(16 bits)
(a) Interrupt control mode 0
(b) Interrupt control mode 2
Note: * Ignored on return.
Figure 4.5 (1) Stack Status after Exception Handling (Normal Modes)
(ZTAT, Mask ROM, and ROMless Versions Only)
SP
CCR
PC
(24bits)
SP
EXR
Reserved*
CCR
PC
(24bits)
(a) Interrupt control mode 0
Note: * Ignored on return.
(b) Interrupt control mode 2
Figure 4.5 (2) Stack Status after Exception Handling (Advanced Modes)
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