HD6432345 Datasheet, PDF (564/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

• Writer mode
Flash memory can be programmed/erased in writer mode, using a PROM programmer, as well
as in on-board programming mode.
17.6.2 Block Diagram
Internal data bus (lower 8 bits)
Internal data bus (upper 8 bits)
SYSCR2
FLMCR1
FLMCR2
EBR1
EBR2
RAMER
Bus interface/controller
H'000000 H'000001
H'000002 H'000003
Flash memory
(128 kbytes)
Operating
mode
FWE pin^*1
Mode pins
(MD₂ to MD₀)
H'01FFFC H'01FFFD
H'01FFFE H'01FFFF
Even
Odd
addresses addresses
Legend:
SYSCR2: System control register 2^*2
FLMCR1: Flash memory control register 1^*2
FLMCR2: Flash memory control register 2^*2
EBR1: Erase block register 1^*2
EBR2: Erase block register 2^*2
RAMER: RAM emulation register^*2
Notes: 1. Functions as FWE pin on F-ZTAT version. Functions as WDTOVF pin on ZTAT,
mask ROM, and ROMless versions.
2. The flash memory control registers (SYSCR2, FLMCR1, FLMCR2, EBR1, EBR2,
RAMER) are enabled on the F-ZTAT version only. They do not exist on the ZTAT,
mask ROM, and ROMless versions, so an undefined value will be returned if they
are read, and it is not possible to write to these registers.
Figure 17.7 Block Diagram of Flash Memory
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