English
Language : 

HD6432345 Datasheet, PDF (490/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual
13.1.4 Register Configuration
Table 13.2 shows the registers used by the Smart Card interface. Details of SMR, BRR, SCR,
TDR, RDR, and MSTPCR are the same as for the normal SCI function: see the register
descriptions in section 12, Serial Communication Interface.
Table 13.2 Smart Card Interface Registers
Channel Name
Abbreviation
0
Serial mode register 0 SMR0
Bit rate register 0
BRR0
Serial control register 0 SCR0
Transmit data register 0 TDR0
Serial status register 0 SSR0
Receive data register 0 RDR0
Smart card mode
register 0
SCMR0
1
Serial mode register 1 SMR1
Bit rate register 1
BRR1
Serial control register 1 SCR1
Transmit data register 1 TDR1
Serial status register 1 SSR1
Receive data register 1 RDR1
Smart card mode
register 1
SCMR1
All
Module stop control
MSTPCR
register
Notes: 1. Lower 16 bits of the address.
2. Can only be written with 0 for flag clearing.
R/W Initial Value
R/W H'00
R/W H'FF
R/W H'00
R/W H'FF
R/(W)*2 H'84
R
H'00
R/W H'F2
R/W H'00
R/W H'FF
R/W H'00
R/W H'FF
R/(W)*2 H'84
R
H'00
R/W H'F2
R/W H'3FFF
Address*1
H'FF78
H'FF79
H'FF7A
H'FF7B
H'FF7C
H'FF7D
H'FF7E
H'FF80
H'FF81
H'FF82
H'FF83
H'FF84
H'FF85
H'FF86
H'FF3C
476