HD6432345 Datasheet, PDF (94/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

3.2.3 System Control Register 2 (SYSCR2) (F-ZTAT Version Only)
Bit
:
7
6
5
4
3
2
1
0
—
—
—
— FLSHE —
—
—
Initial value :
0
0
0
0
0
0
0
0
R/W
:—
—
—
—
R/W
—
—
—
SYSCR2 is an 8-bit readable/writable register that performs on-chip flash memory control.
SYSCR2 is initialized to H'00 by a reset and in hardware standby mode.
SYSCR2 can only be accessed in the F-ZTAT version. In other versions, this register cannot be
written to and will return an undefined value if read.
Bits 7 to 4—Reserved: Read-only bits, always read as 0.
Bit 3—Flash Memory Control Register Enable (FLSHE): Controls CPU access to the flash
memory control registers (FLMCR1, FLMCR2, EBR1, and EBR2). For details, see section 17,
ROM.
Bit 3
FLSHE
0
1
Description
Flash control registers are not selected for addresses H'FFFFC8 to H'FFFFCB
(Initial value)
Flash control registers are selected for addresses H'FFFFC8 to H'FFFFCB
Bits 2 to 0—Reserved: Read-only bits, always read as 0.
74