HD6432345 Datasheet, PDF (693/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Table A.1 Instruction Set (cont)
(2) Arithmetic Instructions (cont)
Addressing Mode/
Instruction Length (Bytes)
DIVXU
Mnemonic
DIVXU.B Rs,Rd
DIVXU.W Rs,ERd
DIVXS
divxs.B Rs,Rd
DIVXS.W Rs,ERd
CMP
NEG
EXTU
CMP.B #xx:8,Rd
CMP.B Rs,Rd
CMP.W #xx:16,Rd
CMP.W Rs,Rd
CMP.L #xx:32,ERd
CMP.L ERs,ERd
NEG.B Rd
NEG.W Rd
NEG.L ERd
EXTU.W Rd
EXTU.L ERd
B2
W2
B4
W4
B2
B2
W4
W2
L6
L2
B2
W2
L2
W2
L2
Condition Code No. of States*¹
Operation
I H N Z V C Advanced
Rd16÷Rs8→Rd16 (RdH: remainder, — — [6] [7] — —
12
RdL: quotient) (unsigned division)
ERd32÷Rs16→ERd32 (Ed: remainder, — — [6] [7] — —
20
Rd: quotient) (unsigned division)
Rd16÷Rs8→Rd16 (RdH: remainder, — — [8] [7] — —
13
RdL: quotient) (signed division)
ERd32÷Rs16→ERd32 (Ed: remainder, — — [8] [7] — —
21
Rd: quotient) (signed division)
Rd8-#xx:8
—
1
Rd8-Rs8
—
1
Rd16-#xx:16
— [3]
2
Rd16-Rs16
— [3]
1
ERd32-#xx:32
— [4]
3
ERd32-ERs32
— [4]
1
0-Rd8→Rd8
—
1
0-Rd16→Rd16
—
1
0-ERd32→ERd32
—
1
0→(<bit 15 to 8> of Rd16)
—— 0 0 —
1
0→(<bit 31 to 16> of ERd32) — — 0 0 —
1