English
Language : 

HD6432345 Datasheet, PDF (289/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual
Port G
Port G pins
PG4/ CS0
PG3/ CS1
PG2/ CS2
PG1/ CS3/IRQ7
PG0/ ADTRG/IRQ6
Pin functions in modes 1 and 2*
PG4 (input)/CS0 (output)
PG3 (I/O)
PG2 (I/O)
PG1 (I/O)/ IRQ7 (input)
PG0 (I/O)/ ADTRG (input)/ IRQ6 (input)
Pin functions in modes 3 and 7*
Pin functions in modes 4 to 6*
PG4 (I/O)
PG3 (I/O)
PG2 (I/O)
PG1 (I/O)/ IRQ7 (input)
PG0 (I/O)/ ADTRG (input)/ IRQ6 (input)
PG4 (input)/ CS0 (output)
PG3 (input)/ CS1 (output)
PG2 (input)/ CS2 (output)
PG1 (input)/ CS3 (output)/ IRQ7 (input)
PG0 (I/O)/ADTRG (input)/ IRQ6 (input)
Note: * Modes 1 to 3 are not available on the F-ZTAT version.
Modes 2, 3, 6, and 7 are not available on the ROMless version.
Figure 8.24 Port G Pin Functions
8.12.2 Register Configuration
Table 8.21 shows the port G register configuration.
Table 8.21 Port G Registers
Name
Abbreviation
R/W
Port G data direction register
PGDDR
W
Port G data register
PGDR
R/W
Port G register
PORTG
R
Notes: 1. Value of bits 4 to 0.
2. Lower 16 bits of the address.
3. Initial value depends on the mode.
Initial Value*1
H'10/H'00*3
H'00
Undefined
Address*2
H'FEBF
H'FF6F
H'FF5F
272