HD6432345 Datasheet, PDF (718/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Table A.2 Instruction Codes (cont)
Instruc-
tion
Mnemonic
Size
MOV MOV.W @ERs+,Rd
W
MOV.W @aa:16,Rd
W
MOV.W @aa:32,Rd
W
MOV.W Rs,@ERd
W
MOV.W Rs,@(d:16,ERd) W
MOV.W Rs,@(d:32,ERd) W
MOV.W Rs,@-ERd
W
MOV.W Rs,@aa:16
W
MOV.W Rs,@aa:32
W
MOV.L #xx:32,Rd
L
MOV.L ERs,ERd
L
MOV.L @ERs,ERd
L
MOV.L @(d:16,ERs),ERd L
MOV.L @(d:32,ERs),ERd L
MOV.L @ERs+,ERd
L
MOV.L @aa:16 ,ERd
L
MOV.L @aa:32 ,ERd
L
MOV.L ERs,@ERd
L
MOV.L ERs,@(d:16,ERd) L
MOV.L ERs,@(d:32,ERd)* L
MOV.L ERs,@-ERd
L
MOV.L ERs,@aa:16
L
MOV.L ERs,@aa:32
L
MOVFPE MOVFPE @aa:16,Rd
B
MOVTPE MOVTPE Rs,@aa:16
B
MULXS MULXS.B Rs,Rd
B
MULXS.W Rs,ERd
W
MULXU MULXU.B Rs,Rd
B
MULXU.W Rs,ERd
W
Instruction Format
1st byte 2nd byte 3rd byte 4th byte 5th byte 6th byte 7th byte
6 D 0 ers rd
6 B 0 rd
abs
6 B 2 rd
abs
6 9 1 erd rs
6 F 1 erd rs
disp
7 8 0 erd 0 6 B A rs
disp
6 D 1 erd rs
6 B 8 rs
abs
6 B A rs
abs
7 A 0 0 erd
IMM
0 F 1 ers 0 erd
0 1 0 0 6 9 0 ers 0 erd
0 1 0 0 6 F 0 ers 0 erd
disp
0 1 0 0 7 8 0 ers 0 6 B 2 0 erd
0 1 0 0 6 D 0 ers 0 erd
0 1 0 0 6 B 0 0 erd
abs
0 1 0 0 6 B 2 0 erd
abs
0 1 0 0 6 9 1 erd 0 ers
0 1 0 0 6 F 1 erd 0 ers
disp
0 1 0 0 7 8 0 erd 0 6 B A 0 ers
0 1 0 0 6 D 1 erd 0 ers
0 1 0 0 6 B 8 0 ers
abs
0 1 0 0 6 B A 0 ers
abs
Cannot be used in the H8S/2345 Series
0 1 C 0 5 0 rs rd
0 1 C 0 5 2 rs 0 erd
5 0 rs rd
5 2 rs 0 erd
8th byte 9th byte 10th byte
disp
disp