HD6432345 Datasheet, PDF (258/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

8.6.3 Pin Functions
Modes 1, 2, 3 and 7*: In mode 1, 2, 3, and 7*, port A pins function as I/O ports. Input or output
can be specified for each pin on an individual bit basis. Setting a PADDR bit to 1 makes the
corresponding port A pin an output port, while clearing the bit to 0 makes the pin an input port.
Port A pin functions in modes 1, 2, 3, and 7 are shown in figure 8.6.
Port A
PA₃ (I/O)
PA₂ (I/O)
PA₁ (I/O)
PA₀ (I/O)
Figure 8.6 Port A Pin Functions (Modes 1, 2, 3, and 7)*
Modes 4 and 5: In modes 4 and 5, the lower 4 bits of port A are designated as address outputs
automatically.
Port A pin functions in modes 4 and 5 are shown in figure 8.7.
Port A
A₁₉ (output)
A₁₈ (output)
A₁₇ (output)
A₁₆ (output)
Figure 8.7 Port A Pin Functions (Modes 4 and 5)
Mode 6*: In mode 6*, port A pins function as address outputs or input ports. Input or output can
be specified on an individual bit basis. Setting a PADDR bit to 1 makes the corresponding port A
pin an address output, while clearing the bit to 0 makes the pin an input port.
Port A pin functions in mode 6 are shown in figure 8.8.
Note: * Modes 1 to 3 are not available on the F-ZTAT version.
Modes 2, 3, 6, and 7 are not available on the ROMless version.
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