HD6432345 Datasheet, PDF (675/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

20.3.2 Control Signal Timing
The control signal timing is shown below.
Reset Input Timing: Figure 20.9 shows the reset input timing.
Interrupt Input Timing: Figure 20.10 shows the interrupt input timing for NMI and IRQ.
ø
RES
NMI
MD2 to MD₀
FWE
t_RESS
t_RESS
t_RESS
t_NMIRS
t_RESW
t_NMIRH
t_MDS
t_MDS
Figure 20.9 Reset Input Timing
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