HD6432345 Datasheet, PDF (328/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D
conversion start requests by TGRA input capture/compare match.
Bit 7
TTGE
0
1
Description
A/D conversion start request generation disabled
A/D conversion start request generation enabled
(Initial value)
Bit 6—Reserved: Read-only bit, always read as 1.
Bit 5—Underflow Interrupt Enable (TCIEU): Enables or disables interrupt requests (TCIU) by
the TCFU flag when the TCFU flag in TSR is set to 1 in channels 1 and 2.
In channels 0 and 3, bit 5 is reserved. It is always read as 0 and cannot be modified.
Bit 5
TCIEU
0
1
Description
Interrupt requests (TCIU) by TCFU disabled
Interrupt requests (TCIU) by TCFU enabled
(Initial value)
Bit 4—Overflow Interrupt Enable (TCIEV): Enables or disables interrupt requests (TCIV) by
the TCFV flag when the TCFV flag in TSR is set to 1.
Bit 4
TCIEV
0
1
Description
Interrupt requests (TCIV) by TCFV disabled
Interrupt requests (TCIV) by TCFV enabled
(Initial value)
Bit 3—TGR Interrupt Enable D (TGIED): Enables or disables interrupt requests (TGID) by the
TGFD bit when the TGFD bit in TSR is set to 1 in channels 0 and 3.
In channels 1, 2, 4, and 5, bit 3 is reserved. It is always read as 0 and cannot be modified.
Bit 3
TGIED
0
1
Description
Interrupt requests (TGID) by TGFD bit disabled
Interrupt requests (TGID) by TGFD bit enabled
(Initial value)
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