HD6432345 Datasheet, PDF (794/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

IPRA — Interrupt Priority Register A
IPRB — Interrupt Priority Register B
IPRC — Interrupt Priority Register C
IPRD — Interrupt Priority Register D
IPRE — Interrupt Priority Register E
IPRF — Interrupt Priority Register F
IPRG — Interrupt Priority Register G
IPRH — Interrupt Priority Register H
IPRI — Interrupt Priority Register I
IPRJ — Interrupt Priority Register J
IPRK — Interrupt Priority Register K
H'FEC4
H'FEC5
H'FEC6
H'FEC7
H'FEC8
H'FEC9
H'FECA
H'FECB
H'FECC
H'FECD
H'FECE
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Bit
:
7
6
5
4
3
2
1
0
—
IPR6 IPR5 IPR4
—
IPR2 IPR1 IPR0
Initial value :
0
1
1
1
0
1
1
1
Read/Write :
—
R/W R/W R/W
—
R/W
R/W
R/W
Set priority (levels 7 to 0) for interrupt sources
Correspondence between Interrupt Sources and IPR Settings
Register
IPRA IRQ0
6 to 4
Bits
IRQ1
2 to 0
IPRB IRQ2
IRQ3
IRQ4
IRQ5
IPRC
IPRD
IPRE
IRQ6
IRQ7
WDT
—^*
DTC
—^*
A/D converter
IPRF TPU channel 0
TPU channel 1
IPRG TPU channel 2
TPU channel 3
IPRH TPU channel 4
TPU channel 5
IPRI
IPRJ
IPRK
8-bit timer channel 0
—^*
SCI channel 1
8-bit timer channel 1
SCI channel 0
—^*
Note: * Reserved bits. May be read or written, but the setting is ignored.
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