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HD6432345 Datasheet, PDF (585/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual
The contents of the CPU’s internal general registers are undefined at this time, so these
registers must be initialized immediately after branching to the programming control program.
In particular, since the stack pointer (SP) is used implicitly in subroutine calls, etc., a stack area
must be specified for use by the programming control program.
Initial settings must also be made for the other on-chip registers.
• Boot mode can be entered by making the settings to the FWE pin and the mode pins (MD2 to
MD0) shown in Table 17.14 and executing a reset-start. (See figure 17.37.)
To change from boot mode to another mode (user mode, etc.), the microcomputer's internal
boot mode status must first be cleared by inputting a reset using the RES pin*1. In this case, the
RES pin must be kept low (tRESW) for at least 20 states. (See figure 17.38.)
• Do not change the FWE pin and mode pin input levels in boot mode, and do not drive the FWE
pin low while the boot program is being executed or while flash memory is being programmed
or erased.*2
• If the FWE pin or mode pin input levels are changed (for example, from low to high) during a
reset, the state of ports with multiplexed address functions and bus control output pins (AS,
RD, HWR, LWR) will change according to the change in the microcomputer’s operating
mode*3.
Therefore, care must be taken to make pin settings to prevent these pins from becoming output
signal pins during a reset, or to prevent collision with signals outside the microcomputer.
Notes: 1. FWE pin and mode pin input must satisfy the mode programming setup time (tMDS)
with respect to the reset release timing, as shown in figures 17.36 to 17.38.
2. For further information on FWE application and disconnection, see section 17.14,
Flash Memory Programming and Erasing Precautions.
3. See appendix D, Pin States.
17.8.2 User Program Mode
When set to user program mode, the chip can program and erase its flash memory by executing a
user program/erase control program. Therefore, on-board reprogramming of the on-chip flash
memory can be carried out by providing on-board means of FWE control and supply of
programming data, and storing a program/erase control program in part of the program area as
necessary.
To select user program mode, select a mode that enables the on-chip flash memory (mode 6 or 7),
and apply a high level to the FWE pin. In this mode, on-chip supporting modules other than flash
memory operate as they normally would in modes 6 and 7, see figures 17.37 and 17.38.
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