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| HD6432345 Datasheet, PDF (174/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual | |||
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Bus cycle
T1
T2
ø
Address bus
CSn
AS
RD
Read
D15 to D8
Valid
D7 to D0
HWR
Write
LWR
D15 to D8
Valid
Valid
D7 to D0
Valid
Note: n = 0 to 3
Figure 6.10 Bus Timing for 16-Bit 2-State Access Space (3) (Word Access)
155
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