HD6432345 Datasheet, PDF (598/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

17.11.2 RAM Overlap
An example in which flash memory block area EB1 is overlapped is shown below.
H'000000
EB0
H'000400
EB1
H'000800
EB2
H'000C00
EB3
This area can be accessed
from both the RAM area
and flash memory area
Flash memory
EB4 to EB9
H'FFEC00
H'FFEFFF
On-chip RAM
Figure 17.25 Example of RAM Overlap Operation
Example in Which Flash Memory Block Area (EB1) is Overlapped
1. Set bits RAMS, RAM1, and RAM0 in RAMER to 1, 0, 1, to overlap part of RAM onto the
area (EB1) for which real-time programming is required.
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks
regardless of the value of RAM1 and RAM0 (emulation protection). In this state,
setting the P or E bit in flash memory control register 1 (FLMCR1) will not cause a
transition to program mode or erase mode. When actually programming a flash
memory area, the RAMS bit should be cleared to 0.
2. A RAM area cannot be erased by execution of software in accordance with the erase
algorithm while flash memory emulation in RAM is being used.
3. Block area EB0 includes the vector table. When performing RAM emulation, the
vector table is needed by the overlap RAM.
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