HD6432345 Datasheet, PDF (786/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

TMDR5—Timer Mode Register 5
Bit
:
7
6
5
—
—
—
Initial value :
1
1
0
Read/Write :
—
—
—
H'FEA1
4
3
2
1
0
—
MD3 MD2 MD1 MD0
0
0
0
0
0
—
R/W R/W R/W R/W
TPU5
Mode
0 0 0 0 Normal operation
1 Reserved
1 0 PWM mode 1
1 PWM mode 2
1 0 0 Phase counting mode 1
1 Phase counting mode 2
1 0 Phase counting mode 3
1 Phase counting mode 4
1 * * *—
* : Don’t care
Notes: MD3 is a reserved bit. In a write, it
should always be written with 0.
777