HD6432345 Datasheet, PDF(583/907 Page) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

HD6432345 Datasheet, PDF (583/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

◁

Automatic SCI Bit Rate Adjustment

Start

bit

D0

D1

D2

D3

D4

D5

D6

D7

Stop

bit

Low period (9 bits) measured (H'00 data)

High period

(1 or more bits)

Figure 17.17 Measurement of Low Period of Host Transmission Data

When boot mode is initiated, the H8S/2345 MCU measures the low period of the asynchronous

SCI communication data (H'00) transmitted continuously from the host, see figure 17.17. The SCI

transmit/receive format should be set as follows: 8-bit data, 1 stop bit, no parity. The MCU

calculates the bit rate of the transmission from the host from the measured low period, and

transmits one H'00 byte to the host to indicate the end of bit rate adjustment. The host should

confirm that this adjustment end indication (H'00) has been received normally, and transmit one

H'55 byte to the MCU. If reception cannot be performed normally, initiate boot mode again

(reset), and repeat the above operations. Depending on the hostâs transmission bit rate and the

MCUâs system clock frequency, there will be a discrepancy between the bit rates of the host and

the MCU. To ensure correct SCI operation, the hostâs transfer bit rate should be set to (4800, or

9600) bps.

Table 17.15 shows typical host transfer bit rates and system clock frequencies for which automatic

adjustment of the MCUâs bit rate is possible. The boot program should be executed within this

system clock range.

Table 17.15 System Clock Frequencies for which Automatic Adjustment of H8S/2345 Bit

Rate is Possible

Host Bit Rate

9600 bps

4800 bps

System Clock Frequency for which Automatic Adjustment

of H8S/2345 Bit Rate is Possible

8 MHz to 20 MHz

4 MHz to 20 MHz

On-Chip RAM Area Divisions in Boot Mode: In boot mode, the 2 kbytes area from H'FFEC00

to H'FFF3FF is reserved for use by the boot program, as shown in figure 17.18. The area to which

the programming control program is transferred is H'FFF400 to H'FFFBFF. The boot program

area can be used when the programming control program transferred into RAM enters the

execution state. A stack area should be set up as required.

571

▷