HD6432345 Datasheet, PDF (502/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

13.3.5 Clock
Only an internal clock generated by the on-chip baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1 and
CKS0 bits in SMR. The formula for calculating the bit rate is as shown below. Table 13.5 shows
some sample bit rates.
If clock output is selected by setting CKE0 to 1, a clock with a frequency of 372 times the bit rate
is output from the SCK pin.
φ
B=
× 10⁶
1488 × 2^2n–1 × (N + 1)
Where: N = Value set in BRR (0 ≤ N ≤ 255)
B = Bit rate (bit/s)
ø = Operating frequency (MHz)
n = See table 13.4
Table 13.4 Correspondence between n and CKS1, CKS0
n
CKS1
CKS0
0
0
0
1
1
2
1
0
3
1
Table 13.5 Examples of Bit Rate B (bit/s) for Various BRR Settings (When n = 0)
ø (MHz)
N
10.00
10.714 13.00
14.285 16.00
0
13441 14400 17473 19200 21505
1
6720
7200
8737
9600
10753
2
4480
4800
5824
6400
7168
Note: Bit rates are rounded to the nearest whole number.
18.00
24194
12097
8065
20.00
26882
13441
8961
488