HD6432345 Datasheet, PDF (46/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Stack Structure: When the program counter (PC) is pushed onto the stack in a subroutine call,
and the PC, condition-code register (CCR), and extended control register (EXR) are pushed onto
the stack in exception handling, they are stored as shown in figure 2.3. When EXR is invalid, it is
not pushed onto the stack. For details, see section 4, Exception Handling.
SP
PC
(16 bits)
SP
*2
(SP )
EXR^*1
Reserved^*1,*3
CCR
CCR^*3
PC
(16 bits)
(a) Subroutine Branch
(b) Exception Handling
Notes: 1. When EXR is not used it is not stored on the stack.
2. SP when EXR is not used.
3. Ignored when returning.
Figure 2.3 Stack Structure in Normal Mode
(2) Advanced Mode
Address Space: Linear access is provided to a 16-Mbyte maximum address space (architecturally
a maximum 16-Mbyte program area and a maximum 4-Gbyte data area, with a maximum of 4
Gbytes for program and data areas combined).
Extended Registers (En): The extended registers (E0 to E7) can be used as 16-bit registers, or as
the upper 16-bit segments of 32-bit registers or address registers.
Instruction Set: All instructions and addressing modes can be used.
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