HD6432345 Datasheet, PDF (764/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Address Register
(low) Name Bit 7
H’FEC4 IPRA —
H’FEC5 IPRB —
Bit 6
IPR6
IPR6
Bit 5
IPR5
IPR5
Bit 4
IPR4
IPR4
Bit 3
—
—
Bit 2
IPR2
IPR2
Bit 1
IPR1
IPR1
Bit 0
IPR0
IPR0
Module Name
Interrupt
controller
Data Bus
Width
8 bit
H’FEC6 IPRC —
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FEC7 IPRD —
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FEC8 IPRE —
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FEC9 IPRF —
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FECA IPRG —
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FECB IPRH —
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FECC IPRI
—
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FECD IPRJ —
IPR6 IPR5 IPR4 —
IPR2 IPR1 IPR0
H’FECE IPRK —
IPR6 IPR5 IPR4 —
—
—
—
H’FED0 ABWCR ABW7 ABW6 ABW5 ABW4 ABW3 ABW2 ABW1 ABW0 Bus controller 8 bit
H’FED1 ASTCR AST7 AST6 AST5 AST4 AST3 AST2 AST1 AST0
H’FED2 WCRH W71 W70 W61 W60 W51 W50 W41 W40
H’FED3 WCRL W31 W30 W21 W20 W11 W10 W01 W00
H’FED4 BCRH ICIS1 ICIS0 BRSTRM BRSTS1 BRSTS0 —
—
—
H’FED5 BCRL BRLE —
EAE —
—
—
—
WAITE
H'FEDB RAMER —
—
—
—
—
RAMS RAM1 RAM0
H’FF2C
H’FF2D
ISCRH
ISCRL
IRQ7SCB IRQ7SCA IRQ6SCB IRQ6SCA IRQ5SCB IRQ5SCA IRQ4SCB IRQ4SCA
IRQ3SCB IRQ3SCA IRQ2SCB IRQ2SCA IRQ1SCB IRQ1SCA IRQ0SCB IRQ0SCA
Interrupt
controller
8 bit
H’FF2E IER
IRQ7E IRQ6E IRQ5E IRQ4E IRQ3E IRQ2E IRQ1E IRQ0E
H’FF2F ISR
IRQ7F IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F IRQ1F IRQ0F
H’FF30 to DTCER DTCE7 DTCE6 DTCE5 DTCE4 DTCE3 DTCE2 DTCE1 DTCE0 DTC
8 bit
H’FF34
H’FF37 DTVECR SWDTE DTVEC6 DTVEC5 DTVEC4 DTVEC3 DTVEC2 DTVEC1 DTVEC0
H’FF38 SBYCR SSBY STS2 STS1 STS0 OPE —
—
—
Power-down _{8 bit}
mode
H’FF39 SYSCR —
—
INTM1 INTM0 NMIEG —
—
RAME MCU
8 bit
H’FF3A SCKCR PSTOP —
—
—
—
SCK2 SCK1 SCK0 ^{Clock pulse}
8 bit
generator
H’FF3B MDCR —
—
—
—
—
MDS2 MDS1 MDS0 MCU
8 bit
H’FF3C MSTPCRH MSTP15 MSTP14 MSTP13 MSTP12 MSTP11 MSTP10 MSTP9 MSTP8 Power-down 8 bit
H’FF3D MSTPCRL MSTP7 MSTP6 MSTP5 MSTP4 MSTP3 MSTP2 MSTP1 MSTP0 ^mode
H'FF42 SYSCR2 —
—
—
—
FLSHE —
—
—
MCU
8 bit
H'FF44 Reserved —
—
—
—
—
—
—
—
Reserved
—
H'FF45 Reserved —
—
—
—
—
—
—
—
755