HD6432345 Datasheet, PDF (479/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Initialization
Start reception
[1]
[1] SCI initialization:
The RxD pin is automatically
designated as the receive data
input pin.
Read ORER flag in SSR
[2] [3] Receive error processing:
[2]
If a receive error occurs, read the
ORER flag in SSR , and after
ORER= 1
Yes
[3]
performing the appropriate error
processing, clear the ORER flag
to 0. Transfer cannot be resumed
No
Error processing
if the ORER flag is set to 1.
[4] SCI status check and receive
(Continued below)
data read:
Read RDRF flag in SSR
[4]
Read SSR and check that the
RDRF flag is set to 1, then read
the receive data in RDR and
No
RDRF= 1
clear the RDRF flag to 0.
Transition of the RDRF flag from
0 to 1 can also be identified by
Yes
an RXI interrupt.
Read receive data in RDR, and
clear RDRF flag in SSR to 0
No
All data received?
Yes
Clear RE bit in SCR to 0
<End>
[5] Serial reception continuation
procedure:
To continue serial reception,
before the MSB (bit 7) of the
current frame is received, finish
[5]
reading the RDRF flag, reading
RDR, and clearing the RDRF flag
to 0. The RDRF flag is cleared
automatically when the DTC is
activated by a receive data full
interrupt (RXI) request and the
RDR value is read.
[3]
Error processing
Overrun error processing
Clear ORER flag in SSR to 0
<End>
Figure 12.18 Sample Serial Reception Flowchart
465