HD6432345 Datasheet, PDF (604/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Table 17.22 DC Characteristics in Memory Read Mode
(Conditions: V_CC = 5.0 V ±10%, V_SS = 0 V, T_a = 25°C ±5°C)
Item
Test
Symbol Min Typ Max Unit Conditions
Input high-level
voltage
FO₇–FO₀, FA₁₆–FA₀ V_IH
2.2 —
V_CC + V
0.3
Input low-level
voltage
FO₇–FO₀, FA₁₆–FA₀ V_IL
0.3 —
0.8 V
Schmitt trigger
input voltage
OE, CE, WE
V_T–
1.0 —
2.5 V
Output high-level FO₇–FO₀
voltage
V_T+
2.0 —
V_T+–V_T– 0.4
—
V_OH
2.4 —
3.5 V
—
V
—
V I_OH = –200 µA
Output low-level FO₇–FO₀
voltage
V_OL
—
—
0.45 V I_OL = 1.6 mA
Input leak current FO₇–FO₀, FA₁₆–FA₀ | I_LI |
—
—
2
µA
V_CC current
During read
I _CC
—
40
65
mA
During programming I_CC
—
50
85
mA
During erasing
I _CC
—
50
85
mA
Note: Refer to the maximum rating for the F-ZTAT version “20.1.1 Absolute Maximum Ratings.”
If the maximum rating is exceeded, the LSI may be damaged permanently.
17.13.4 Memory Read Mode
• After the end of an auto-program, auto-erase, or status read operation, the command wait state
is entered. To read memory contents, a transition must be made to memory read mode by
means of a command write before the read is executed.
• Command writes can be performed in memory read mode, just as in the command wait state.
• Once memory read mode has been entered, consecutive reads can be performed.
• After power-on, memory read mode is entered.
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