HD6432345 Datasheet, PDF (488/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

13.1.2 Block Diagram
Figure 13.1 shows a block diagram of the Smart Card interface.
Module data bus
RxD
TxD
SCK
RDR
RSR
TDR
SCMR
BRR
SSR
TSR
SCR
SMR
Transmission/
reception control
Baud rate
generator
Parity generation
Clock
Parity check
Legend
SCMR : Smart Card mode register
RSR : Receive shift register
RDR : Receive data register
TSR : Transmit shift register
TDR : Transmit data register
SMR : Serial mode register
SCR : Serial control register
SSR : Serial status register
BRR : Bit rate register
ø
ø/4
ø/16
ø/64
TXI
RXI
ERI
Figure 13.1 Block Diagram of Smart Card Interface
Internal
data bus
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