HD6432345 Datasheet, PDF (722/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Table A.2 Instruction Codes (cont)
Instruc-
tion
Mnemonic
Size
STC
STM
STMAC
SUB
SUBS
SUBX
TAS
TRAPA
XOR
STC.W CCR,@aa:16
W
STC.W EXR,@aa:16
W
STC.W CCR,@aa:32
W
STC.W EXR,@aa:32
W
STM.L(ERn-ERn+1), @-SP L
STM.L (ERn-ERn+2), @-SP L
STM.L (ERn-ERn+3), @-SP L
STMAC MACH,ERd
L
STMAC MACL,ERd
L
SUB.B Rs,Rd
B
SUB.W #xx:16,Rd
W
SUB.W Rs,Rd
W
SUB.L #xx:32,ERd
L
SUB.L ERs,ERd
L
SUBS #1,ERd
L
SUBS #2,ERd
L
SUBS #4,ERd
L
SUBX #xx:8,Rd
B
SUBX Rs,Rd
B
TAS @ERd
B
TRAPA #x:2
—
XOR.B #xx:8,Rd
B
XOR.B Rs,Rd
B
XOR.W #xx:16,Rd
W
XOR.W Rs,Rd
W
XOR.L #xx:32,ERd
L
XOR.L ERs,ERd
L
1st byte 2nd byte 3rd byte 4th byte
01406B80
01416B80
0 1 4 0 6BA0
0 1 4 1 6BA0
0 1 1 0 6 D F 0 ern
0 1 2 0 6 D F 0 ern
0 1 3 0 6 D F 0 ern
Cannot be used in the H8S/2345 Series
Instruction Format
5th byte 6th byte 7th byte
abs
abs
abs
abs
1 8 rs rd
7
9
3 rd
1 9 rs rd
7
A
3 0 ^erd
1 A 1 ers 0 ^erd
1
B
0 0 ^erd
1
B
8 0 ^erd
1
B
9 0 ^erd
B rd
IMM
1 E rs rd
0
1
E
07
5 7 00 IMM 0
D rd
IMM
1 5 rs rd
7
9
5 rd
6 5 rs rd
7
A
5 0 ^erd
0
1
F 06
IMM
IMM
B 0 erd C
IMM
IMM
5 0 ers 0 erd
8th byte
9th byte 10th byte