HD6432345 Datasheet, PDF (859/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

TIOR1—Timer I/O Control Register 1
H'FFE2
TPU1
Bit
:
Initial value :
Read/Write :
7
IOB3
0
R/W
6
IOB2
0
R/W
5
IOB1
0
R/W
4
IOB0
0
R/W
3
IOA3
0
R/W
2
IOA2
0
R/W
1
IOA1
0
R/W
0
IOA0
0
R/W
TGR1A I/O Control
0 0 0 0 TGR1A Output disabled
1
is output
compare
Initial output is
1 0 ^{register 0 output}
0 output at compare match
1 output at compare match
1
Toggle output at compare match
100
Output disabled
1
10
Initial output is
1 output
0 output at compare match
1 output at compare match
1
Toggle output at compare match
1 0 0 0 TGR1A Capture input
is input source is
1 _{capture TIOCA1 pin}
1 * ^register
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
1**
Capture input Input capture at generation of
source is TGR0A channel 0/TGR0A compare match/
compare match/ input capture
input capture
* : Don’t care
TGR1B I/O Control
0 0 0 0 TGR1B Output disabled
1
is output
compare ^{Initial output is}
1 0 ^{register 0 output}
0 output at compare match
1 output at compare match
1
Toggle output at compare match
100
Output disabled
1
10
Initial output is
1 output
0 output at compare match
1 output at compare match
1
Toggle output at compare match
1 0 0 0 TGR1B _{Capture input}
1
is input
capture
source is
TIOCB1 pin
1 * ^register
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
1**
Capture input Input capture at generation of
source is TGR0C TGR0B compare match/input
compare match/ capture
input capture
* : Don’t care
850