HD6432345 Datasheet, PDF (87/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

2.9.3 On-Chip Supporting Module Access Timing
The on-chip supporting modules are accessed in two states. The data bus is either 8 bits or 16 bits
wide, depending on the particular internal I/O register being accessed. Figure 2.19 shows the
access timing for the on-chip supporting modules. Figure 2.20 shows the pin states.
Bus cycle
T1
T2
ø
Internal address bus
Address
Read
access
Internal read signal
Internal data bus
Write
access
Internal write signal
Internal data bus
Read data
Write data
Figure 2.19 On-Chip Supporting Module Access Cycle
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