HD6432345 Datasheet, PDF (498/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

13.3.3 Data Format
Figure 13.3 shows the Smart Card interface data format. In reception in this mode, a parity check
is carried out on each frame, and if an error is detected an error signal is sent back to the
transmitting end, and retransmission of the data is requested. If an error signal is sampled during
transmission, the same data is retransmitted.
When there is no parity error
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
Transmitting station output
When a parity error occurs
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
DE
Legend
Ds
: Start bit
D0 to D7 : Data bits
Dp
: Parity bit
DE
: Error signal
Transmitting station output
Receiving station
output
Figure 13.3 Smart Card Interface Data Format
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