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HD6432345 Datasheet, PDF (667/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual
Control Signal Timing: Table 20.15 lists the control signal timing.
Table 20.15 Control Signal Timing
Condition A: VCC = AVCC = 2.7 to 5.5 V, Vref = 2.7 V to AVCC, VSS = AVSS = 0 V,
ø = 2 to 10 MHz, Ta = –20 to +75°C (regular specifications),
Ta = –40 to +85°C (wide-range specifications)
Condition B: VCC = AVCC = 5.0 V ± 10%, Vref = 4.5 V to AVCC, VSS = AVSS = 0 V,
ø = 2 to 20 MHz, Ta = –20 to +75°C (regular specifications),
Ta = –40 to +85°C (wide-range specifications)
Item
RES setup time
RES pulse width
NMI reset setup time
NMI reset hold time
NMI setup time
NMI hold time
NMI pulse width (exiting
software standby mode)
IRQ setup time
IRQ hold time
IRQ pulse width (exiting
software standby mode)
Condition A
Symbol Min Max
t RESS
t RESW
t NMIRS
t NMIRH
t NMIS
t NMIH
t NMIW
200 —
20 —
250 —
200 —
250 —
10 —
200 —
Condition B
Min Max Unit
200 — ns
20
—
t cyc
200 — ns
200 — ns
150 — ns
10 — ns
200 — ns
Test Conditions
Figure 20.9
Figure 20.10
t IRQS
t IRQH
t IRQW
250 —
10 —
200 —
150 — ns
10 — ns
200 — ns
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