HD6432345 Datasheet, PDF (454/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Table 12.8 SMR Settings and Serial Transfer Format Selection
SMR Settings
SCI Transfer Format
Bit 7
C/A
0
1
Bit 6
CHR
0
1
0
1
—
Bit 2
MP
0
1
—
Bit 5
PE
0
1
0
1
—
—
—
—
—
Bit 3
STOP Mode
Data
Length
0
Asynchronous
8-bit data
1
mode
0
1
0
7-bit data
1
0
1
0
Asynchronous
8-bit data
1
mode (multi-
processor
0
format)
1
7-bit data
—
Clocked
8-bit data
synchronous mode
Multi-
processor
Bit
Parity
Bit
No
No
Yes
No
Yes
Yes
No
No
Stop Bit
Length
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
None
Table 12.9 SMR and SCR Settings and SCI Clock Source Selection
SMR
Bit 7
C/A
0
SCR Setting
Bit 1 Bit 0
CKE1 CKE0 Mode
0
0
Asynchronous
1
mode
Clock
Source
Internal
1
0
External
1
1
0
0
Clocked
Internal
1
synchronous
1
0
mode
External
1
SCI Transmit/Receive Clock
SCK Pin Function
SCI does not use SCK pin
Outputs clock with same frequency as bit
rate
Inputs clock with frequency of 16 times
the bit rate
Outputs serial clock
Inputs serial clock
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