HD6432345 Datasheet, PDF (134/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Table 5.4 Interrupt Sources, Vector Addresses, and Interrupt Priorities (cont)
Interrupt Source
Origin of
Vector Address*¹
Interrupt Vector Normal Advanced
Source Number Mode*² Mode
IPR
CMIA0 (compare match A0) 8-bit timer 64
CMIB0 (compare match B0) channel 0 65
OVI0 (overflow 0)
66
H'0080
H'0082
H'0084
H'0100
H'0104
H'0108
IPRI6 to 4
Reserved
—
67
H'0086 H'010C
CMIA1 (compare match A1) 8-bit timer 68
CMIB1 (compare match B1) channel 1 69
OVI1 (overflow 1)
70
H'0088 H'0110
H'008A H'0114
H'008C H'0118
IPRI2 to 0
Reserved
—
71
72
73
74
75
76
77
78
79
ERI0 (receive error 0)
SCI
80
RXI0 (reception completed 0) channel 0 81
TXI0 (transmit data empty 0)
82
TEI0 (transmission end 0)
83
H'008E
H'0090
H'0092
H'0094
H'0096
H'0098
H'009A
H'009C
H'009E
H'00A0
H'00A2
H'00A4
H'00A6
H'011C
H'0120
H'0124
H'0128
H'012C
H'0130
H'0134
H'0138
H'013C
H'0140
H'0144
H'0148
H'014C
IPRJ2 to 0
ERI1 (receive error 1)
SCI
84
RXI1 (reception completed 1) channel 1 85
TXI1 (transmit data empty 1)
86
TEI1 (transmission end 1)
87
H'00A8
H'00AA
H'00AC
H'00AE
H'0150
H'0154
H'0158
H'015C
IPRK6 to 4
Notes: 1. Lower 16 bits of the start address.
2. ZTAT, mask ROM, and ROMless versions only.
Priority
High
Low
115