HD6432345 Datasheet, PDF (279/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

Port E Data Register (PEDR)
Bit
:
Initial value :
R/W
:
7
PE7DR
0
R/W
6
5
PE6DR PE5DR
0
0
R/W R/W
4
3
PE4DR PE3DR
0
0
R/W R/W
2
PE2DR
0
R/W
1
0
PE1DR PE0DR
0
0
R/W R/W
PEDR is an 8-bit readable/writable register that stores output data for the port E pins (PE₇ to PE₀).
PEDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port E Register (PORTE)
Bit
:
7
6
5
4
3
2
1
0
PE7
PE6 PE5
PE4 PE3 PE2
PE1 PE0
Initial value :
—*
—*
—*
—*
—*
—*
—*
—*
R/W
:
R
R
R
R
R
R
R
R
Note: * Determined by state of pins PE7 to PE0.
PORTE is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port E pins (PE₇ to PE₀) must always be performed on PEDR.
If a port E read is performed while PEDDR bits are set to 1, the PEDR values are read. If a port E
read is performed while PEDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTE contents are determined by the pin
states, as PEDDR and PEDR are initialized. PORTE retains its prior state after a manual reset, and
in software standby mode.
Port E MOS Pull-Up Control Register (PEPCR)
Bit
:
Initial value :
R/W
:
7
6
5
4
3
2
1
0
PE7PCR PE6PCR PE5PCR PE4PCR PE3PCR PE2PCR PE1PCR PE0PCR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PEPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port E on an individual bit basis.
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