HD6432345 Datasheet, PDF (879/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

*2
P3_n
*1
*3
Reset
R
Q
D
P3nDDR
C
WDDR3
Reset
R
Q
D
P3nDR
C
WDR3
Reset
R
Q
D
P3nODR
C
WODR3
RODR3
RDR3
SCI module
Serial clock output
enable
Serial clock output
Serial clock input
enable
RPOR3
Legend
WDDR3 : Write to P3DDR
WDR3 : Write to P3DR
WODR3 : Write to P3ODR
RDR3 : Read P3DR
RPOR3 : Read port 3
RODR3 : Read P3ODR
n = 4 or 5
Notes: 1. Priority order: Serial clock input > serial clock output > DR output
2. Output enable signal
3. Open drain control signal
Serial clock input
Figure C.3 (c) Port 3 Block Diagram (Pins P3₄ and P3₅)
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