HD6432345 Datasheet, PDF (658/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

5. Number of times when the wait time after P bit setting (z) = 200 µs.
The maximum number of writes (N) should be set according to the actual set value of z
so as not to exceed the maximum programming time (t_P (max)).
6. For the maximum erase time (t_E (max)), the following relationship applies between the
wait time after E bit setting (z) and the maximum number of erases (N):
t_E (max) = Wait time after E bit setting (z) × maximum number of erases (N)
The values of z and N should be set so as to satisfy the above formula.
Examples: When z = 5 [ms], N = 240 times
When z = 10 [ms], N = 120 times
Table 20.10 Flash Memory Characteristics (2)
—In planning stage—
Conditions: V_CC = AV_CC = 3.0 to 3.6 V, V_SS = AV_SS = 0 V,
T_a = 0 to +75°C (flash memory programming/erase operating temperature range)
Item
Symbol Min Typ Max Unit
Test
Conditions
Programming time*^1, *^2, *⁴
t_P
— TBD TBD ms/
32 bytes
Erase time*^1, *^3, *⁵
t_E
— TBD TBD ms/block
Number of programmings
Programming Wait time after setting SWE bit*¹
N_WEC
x
——
TBD —
TBD Times
— µs
Wait time after setting PSU bit*¹
y
TBD — — µs
Wait time after setting P bit*^1, *⁴
z
— — TBD µs
Wait time after clearing P bit*¹
α
TBD — — µs
Wait time after clearing PSU bit*¹
β
TBD — — µs
Wait time after setting PV bit*¹
γ
TBD — — µs
Wait time after H'FF dummy write*¹ ε
TBD — — µs
Wait time after clearing PV bit*¹
η
TBD — — µs
Max. number of programmings*^1, *⁴ N
— — TBD Times
Erase
Wait time after setting SWE bit*¹
x
TBD — — µs
Wait time after setting ESU bit*¹
y
TBD — — µs
Wait time after setting E bit*^1, *⁵
z
— — TBD µs
Wait time after clearing E bit*¹
α
TBD — — µs
Wait time after clearing ESU bit*¹
β
TBD — — µs
Wait time after setting EV bit*¹
γ
TBD —
µs
Wait time after H'FF dummy write*¹ ε
TBD — — µs
Wait time after clearing EV bit*¹
η
TBD — — µs
Max. number of erases*^1, *⁵
N
— — TBD Times
Notes: 1. Time settings should be made in accordance with the programming/erase algorithm.
2. Programming time per 32 bytes. (Indicates the total time the P bit in the flash memory
control register (FLMCR1) is set. The program verification time is not included.)
3. Time to erase one block. (Indicates the total time the E bit in FLMCR1 is set. The erase
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