HD6432345 Datasheet, PDF (835/907 Pages) Hitachi Semiconductor – H8S/2345 F-ZTAT Hardware Manual

RDR1—Receive Data Register 1
Bit
:
7
6
5
Initial value :
0
Read/Write :
R
0
0
R
R
H'FF85 SCI1, Smart Card Interface 1
4
3
2
1
0
0
0
0
0
0
R
R
R
R
R
Stores received serial data
SCMR1—Smart Card Mode Register 1
H'FF86 SCI1, Smart Card Interface 1
Bit
:
7
—
Initial value :
1
Read/Write : —
6
5
4
3
2
1
0
—
—
—
SDIR SINV
—
SMIF
1
1
1
0
0
1
0
—
—
—
R/W R/W
—
R/W
Smart Card
Interface Mode Select
0 Smart Card interface
function is disabled
1 Smart Card interface
function is enabled
Smart Card Data Invert
0 TDR contents are transmitted as they are
Receive data is stored in RDR as it is
1 TDR contents are inverted before
being transmitted
Receive data is stored in RDR
in inverted form
Smart Card Data Direction
0 TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
1 TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
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