SH7203 Datasheet, PDF (9/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Contents
Section 1 Overview..............................................................................................1
1.1 SH7203 Features.................................................................................................................... 1
1.2 Product Lineup....................................................................................................................... 9
1.3 Block Diagram ..................................................................................................................... 10
1.4 Pin Arrangement .................................................................................................................. 11
1.5 Pin Functions ....................................................................................................................... 12
1.6 Pin Assignments................................................................................................................... 22
Section 2 CPU....................................................................................................41
2.1 Register Configuration......................................................................................................... 41
2.1.1 General Registers .................................................................................................... 41
2.1.2 Control Registers .................................................................................................... 42
2.1.3 System Registers..................................................................................................... 44
2.1.4 Register Banks ........................................................................................................ 45
2.1.5 Initial Values of Registers....................................................................................... 45
2.2 Data Formats........................................................................................................................ 46
2.2.1 Data Format in Registers ........................................................................................ 46
2.2.2 Data Formats in Memory ........................................................................................ 46
2.2.3 Immediate Data Format .......................................................................................... 47
2.3 Instruction Features.............................................................................................................. 48
2.3.1 RISC-Type Instruction Set...................................................................................... 48
2.3.2 Addressing Modes .................................................................................................. 52
2.3.3 Instruction Format................................................................................................... 57
2.4 Instruction Set ...................................................................................................................... 61
2.4.1 Instruction Set by Classification ............................................................................. 61
2.4.2 Data Transfer Instructions....................................................................................... 67
2.4.3 Arithmetic Operation Instructions .......................................................................... 71
2.4.4 Logic Operation Instructions .................................................................................. 74
2.4.5 Shift Instructions..................................................................................................... 75
2.4.6 Branch Instructions ................................................................................................. 76
2.4.7 System Control Instructions.................................................................................... 77
2.4.8 Floating-Point Operation Instructions..................................................................... 79
2.4.9 FPU-Related CPU Instructions ............................................................................... 81
2.4.10 Bit Manipulation Instructions ................................................................................. 82
2.5 Processing States.................................................................................................................. 84
Rev. 2.00 Apr. 16, 2008 Page ix of xxx
REJ09B0313-0200