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SH7203 Datasheet, PDF (1589/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
CKIO
Tp
Tpw
Trr
Trc
PALL
REF
tAD1
A25 to A0
tAD1
A12/A11*1
CSn
RD/WR
RASU/L
CASU/L
tCSD1
tCSD1
tCSD1
tCSD1
tRWD1 tRWD1
tRASD1 tRASD1
tRASD1 tRASD1
tCASD1
tCASD1
Section 31 Electrical Characteristics
Trc
Trr
Trc
Trc Tmw
Tde
REF
MRS
tAD1
tAD1
tAD1
tCSD1
tCSD1
tRASD1
tRASD1
tCASD1
tCASD1
tCSD1
tCSD1
tRWD1
tRWD1
tRWD1
tRASD1
tRASD1
tCASD1
tCASD1
DQMxx
D31 to D0
(Hi-Z)
BS
CKE
DACKn
TENDn*2
Notes: 1. An address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn and TENDn is when active low is specified.
Figure 31.38 Synchronous DRAM Mode Register Write Timing (WTRP = 1 Cycle)
Rev. 2.00 Apr. 16, 2008 Page 1559 of 1652
REJ09B0313-0200