SH7203 Datasheet, PDF (1647/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Main Revisions for this Edition
Item
Page
11.4.8 Complementary 582
PWM Mode
(3) Interrupt Skipping in
Complementary PWM
Mode
(c) Buffer Transfer
Control Linked with
Interrupt Skipping
Figure 11.71 Example 584
of Operation when Buffer
Transfer is Linked with
Interrupt Skipping (BTE1
= 1 and BTE0 = 0)
Figure 11.72
585
Relationship between
Bits T3AEN and T4VEN
in TITCR and Buffer
Transfer-Enabled Period
11.4.9 A/D Converter 587
Start Request Delaying
Function
• A/D Converter Start
Request Delaying
Function Linked with
Interrupt Skipping
14.2 Input/Output Pin 685
Table 14.1 Pin
Configuration
14.5.4 Crystal Oscillator ⎯
Circuit for RTC
14.5.4 Notes on
711
Register Read and Write
Operations
Revision (See Manual for Details)
Description added
Figure 11.71 shows an example of operation when buffer
transfer is linked with interrupt skipping (BTE1 = 1 and BET0 =
0). While this setting is valid, data is not transferred from the
buffer register outside the buffer transfer-enabled period.
Due to the buffer register rewrite timing after an interrupt, the
timing of transfers from a buffer register to a temporary register
differs from the timing of transfers from a temporary register to
a general register.
Figure replaced
Figure replaced
Description amended
A/D converter start requests (TRG4AN and TRG4BN) can be
issued in coordination with interrupt skipping by making
settings in the UT4AE, DT4AE, UT4BE, and DT4BE bits in the
timer A/D converter start request control register (TADCR).
Table amended
Pin Name
RTC crystal
resonator/external clock
Symbol
RTC_X1
RTC_X2
Deleted
Newly added
I/O
Input
Output
Description
Connects to a 32.768 kHz crystal
resonator for the RTC. Alternately, an
external clock may be input on pin
RTC_X1.
Rev. 2.00 Apr. 16, 2008 Page 1617 of 1652
REJ09B0313-0200