SH7203 Datasheet, PDF (1459/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 29 User Debugging Interface (H-UDI)
Section 29 User Debugging Interface (H-UDI)
This LSI incorporates a user debugging interface (H-UDI) for emulator support.
29.1 Features
The user debugging interface (H-UDI) has reset and interrupt request functions.
The H-UDI in this LSI is used for emulator connection. Refer to the emulator manual for the
method of connecting the emulator.
Figure 29.1 shows a block diagram of the H-UDI.
TDI
SDBPR
SDIR
TDO
MUX
TCK
TMS
TRST
TAP control circuit
Decoder
Local
bus
[Legend]
SDBPR:
SDIR:
Bypass register
Instruction register
Figure 29.1 Block Diagram of H-UDI
Rev. 2.00 Apr. 16, 2008 Page 1429 of 1652
REJ09B0313-0200