SH7203 Datasheet, PDF (1073/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

21.5 Usage Notes
Section 21 D/A Converter (DAC)
21.5.1 Module Standby Mode Setting
Operation of the D/A converter can be disabled or enabled using the standby control register. The
initial setting is for operation of the D/A converter to be halted. Register access is enabled by
canceling module standby mode. For details, see section 28, Power-Down Modes.
21.5.2 D/A Output Hold Function in Software Standby Mode
When this LSI enters software standby mode with D/A conversion enabled, the D/A outputs are
retained, and the analog power supply current is equal to as during D/A conversion. If the analog
power supply current needs to be reduced in software standby mode, clear the DAOE0, DAOE1,
and DAE bits to 0 to disable the D/A outputs.
21.5.3 Setting Analog Input Voltage
The reliability of this LSI may be adversely affected if the following voltage ranges are exceeded.
1. AVcc and AVss input voltages
Input voltages AVcc and AVss should be PVcc − 0.3 V ≤ AVcc ≤ PVcc and AVss = PVss. Do
not leave the AVcc and AVss pins open when the A/D converter or D/A converter is not in use
and in software standby mode. When not in use, connect AVcc to the power supply (PVcc) and
AVss to the ground (PVss).
2. Setting range of AVref input voltage
Set the reference voltage range of the AVref pin as 3.0 V ≤ AVref ≤ AVcc.
21.5.4 D/A Conversion in Deep Standby Mode
Before entering deep standby mode, disable D/A conversion by clearing all of the DAOE0,
DAOE1, and DAE bits to 0. If the LSI enters deep standby mode with D/A conversion enabled,
the states on the D/A converter pins are not guaranteed.
Rev. 2.00 Apr. 16, 2008 Page 1043 of 1652
REJ09B0313-0200