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SH7203 Datasheet, PDF (1475/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Module
Name Register Name
Abbreviation
MTU2 Timer start register
TSTR
Timer synchronous register
TSYR
Timer read/write enable register TRWER
Timer output master enable
register
TOER
Timer output control register 1
TOCR1
Timer output control register 2
TOCR2
Timer gate control register
TGCR
Timer cycle control register
TCDR
Timer dead time data register
TDDR
Timer subcounter
TCNTS
Timer cycle buffer register
TCBR
Timer interrupt skipping set
register
TITCR
Timer interrupt skipping counter TITCNT
Timer buffer transfer set register TBTER
Timer dead time enable register TDER
Timer waveform control register TWCR
Timer output level buffer register TOLBR
CMT
Compare match timer start register CMSTR
Compare match timer control/
status register_0
CMCSR0
Compare match counter_0
CMCNT0
Compare match constant
register_0
CMCOR0
Compare match timer control/
status register_1
CMCSR1
Compare match counter_1
CMCNT1
Compare match constant
register_1
CMCOR1
Section 30 List of Registers
Number
of Bits Address
8
H'FFFE4280
8
H'FFFE4281
8
H'FFFE4284
8
H'FFFE420A
Access
Size
8
8
8
8
8
H'FFFE420E 8
8
H'FFFE420F 8
8
H'FFFE420D 8
16
H'FFFE4214 16
16
H'FFFE4216 16
16
H'FFFE4220 16
16
H'FFFE4222 16
8
H'FFFE4230 8
8
H'FFFE4231 8
8
H'FFFE4232 8
8
H'FFFE4234 8
8
H'FFFE4260 8
8
H'FFFE4236 8
16
H'FFFEC000 16
16
H'FFFEC002 16
16
H'FFFEC004 8, 16
16
H'FFFEC006 8, 16
16
H'FFFEC008 16
16
H'FFFEC00A 8, 16
16
H'FFFEC00C 8, 16
Rev. 2.00 Apr. 16, 2008 Page 1445 of 1652
REJ09B0313-0200