SH7203 Datasheet, PDF (1161/1686 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name
Value
8
BRDY
0
7, 6
⎯
All 0
5
SIGN
0
4
SACK
0
3 to 0 ⎯
All 0
Note: Only 0 can be written to.
R/W
R
R
R/W*
R/W*
R
Description
Buffer Ready Interrupt Status
0: BRDY interrupts not generated
1: BRDY interrupts generated
Reserved
These bits are always read as 0. The write value
should always be 0.
Setup Transaction Error Interrupt Status
0: SIGN interrupts not generated
1: SIGN interrupts generated
Setup Transaction Normal Response Interrupt Status
0: SACK interrupts not generated
1: SACK interrupts generated
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 2.00 Apr. 16, 2008 Page 1131 of 1652
REJ09B0313-0200